LAN7430 datasheet(73/77 Pages) MICROCHIP

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 2018-2019 Microchip Technology Inc.

DS00002631D-page 73

LAN7430/LAN7431

APPENDIX A:

DATA SHEET REVISION HISTORY

TABLE A-1:

REVISION HISTORY

Revision Level & Date

Section/Figure/Entry

Correction

DS00002631D (06-25-19)

Section 7.4, "Power Consumption"

“Preliminary” removed from tables 7-3

and 7-4.

DS00002631C (04-17-19)

Product Identification System

Page modified to include automotive

part numbers.

DS00002631B (10-24-18)

Section 6.1.2, "Reference Clock"

Added the following: “PCIe architecture

defines three clock distribution methods:

common clock, data clock, and separate

clock. The LAN7430/LAN7431 devices

support the common clock method

where both end devices, such as a host

and the device, are using the same

clock source. The details of the common

clock method are provided in the PCIe

specification.”

Section 3.3, "Pin Descriptions"

Updated TEST pin description for clarity.

Cover, Section 2.1, "General Descrip-

tion", Section 6.1, "PCI Express PHY

(PCIe PHY)"

Removed references to “IEEE 1149.6”.

Section 6.12.7, "Soft-Lite Reset"

Added application note regarding LRST

configuration reload.

Table 6-3, "IEEE 1149.1 Op Codes"

Removed EXTEST_PULSE and

EXTEST_TRAIN entries from table.

Table 7-1, "48-SQFN Package Ther-

mal Parameters" and Table 7-2, "72-

SQFN Package Thermal Parameters"

Corrected

JC velocity columns to indi-

cate “N/A”.

Table 7-4, "LAN7431 Power Con-

sumption"

Corrected part number in table title.

Section 6.4, "RGMII (LAN7431 Only)" Added new section.

DS00002631A (02-09-18)

All

Initial Release.

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