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LAN7430 데이터시트(PDF) 12 Page - Microchip Technology |
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LAN7430 데이터시트(HTML) 12 Page - Microchip Technology |
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12 / 77 page ![]() LAN7430/LAN7431 DS00002631D-page 12 2018-2019 Microchip Technology Inc. 3.0 PIN DESCRIPTIONS AND CONFIGURATION The pin assignments for the LAN7430 are detailed in Section 3.1, "LAN7430 Pin Assignments". The pin assignments for the LAN7431 are detailed in Section 3.2, "LAN7431 Pin Assignments". Pin descriptions are provided in Section 3.3, "Pin Descriptions". 3.1 LAN7430 Pin Assignments The device pin diagram for the LAN7430 can be seen in Figure 3-1. Table 3-1 provides a LAN7430 pin assignments table. Pin descriptions are provided in Section 3.3, "Pin Descriptions". FIGURE 3-1: LAN7430 PIN ASSIGNMENTS Note: Configuration straps are identified by an underlined symbol name. Signals that function as configuration straps must be augmented with an external resistor when connected to a load. Note: Exposed pad (VSS) on bottom of package must be connected to ground with a via field . 3 4 5 6 7 8 9 10 34 33 32 31 30 29 28 27 TXRXP_B AVDDL_1 TXRXM_B TXRXP_C TXRXM_C AVDDL_2 TXRXP_D TXRXM_D VDD12CORE 1 2 11 12 26 25 36 35 TXRXM_A TXRXP_A VAUX_DET/GPIO3/LED3/TCK EECLK/GPIO2/LED2/TMS/ADV_PM_DISABLE PCIE_CLK_P PCIE_CLK_M VDD12_SW_FB VDD_SW_IN VDD_REG_IN AVDDH_2 LAN7430 48- S Q FN (Connect exposed pad to ground with a via field ) VSS AVDDH_1 RESET_N TEST VDD25_REG_OUT VDD12_SW_OUT |
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