HM24C32/HM24C64

9

Figure 9. Byte Write

2. Page Write

The HM24C32/64 devices is capable of 32-byte page write.

A page write is initiated the same as a byte write, but the microcontroller does not send a stop

condition after the first data word is clocked in. Instead, after the EEPROM acknowledges

receipt of the first data word, the microcontroller can transmit up to 31 (HM24C32/64) more data

words. The EEPROM will respond with a "0" after each data word received. The microcontroller

must terminate the page write sequence with a stop condition (see Figure 10).

The data word address lower 5 (HM24C32/64) bits are internally incremented following the

receipt of each data word. The higher data word address bits are not incremented, retaining the

memory page row location. When the word address, internally generated, reaches the page

boundary, the following byte is placed at the beginning of the same page. If more than 32

(HM24C32/64) data words are transmitted to the EEPROM, the data word address will "roll

over" and previous data will be overwritten.

Figure 10. Page Write

3. Acknowledge Polling

Once the internally timed write cycle has started and the EEPROM inputs are disabled,

acknowledge polling can be initiated. This involves sending a start condition followed by the

device address word. The read/write bit is representative of the operation desired. Only if the

internal write cycle has completed will the EEPROM respond with a "0", allowing the read or

write sequence to continue. See Figure 11 for flow diagram.

Shenzhen H&M Semiconductor Co.Ltd

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