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ADRF6821 데이터시트(PDF) 61 Page - Analog Devices

부품명 ADRF6821
상세설명  450 MHz to 2800 MHz, DPD RFIC with Integrated Fractional-N PLL and VCO
PDF  61 Pages
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ADRF6821 데이터시트(HTML) 61 Page - Analog Devices

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Data Sheet
ADRF6821
Rev. A | Page 61 of 61
OUTLINE DIMENSIONS
0.50
BSC
*6.80
6.70 SQ
6.60
0.45
0.40
0.35
0.80
0.75
0.70
0.05 MAX
0.02 NOM
0.203 REF
COPLANARITY
0.08
0.30
0.25
0.20
8.10
8.00 SQ
7.90
0.20 MIN
6.50 REF
*COMPLIANT TO JEDEC STANDARDS MO-220-WLLD-5
WITH EXCEPTION TO EXPOSED PAD DIMENSION.
1
56
14
15
43
42
28
29
TOP VIEW
BOTTOM VIEW
SIDE VIEW
EXPOSED
PAD
FOR PROPER CONNECTION OF
THE EXPOSED PAD, REFER TO
THE PIN CONFIGURATION AND
FUNCTION DESCRIPTIONS
SECTION OF THIS DATA SHEET.
PIN 1
INDICATOR AREA OPTIONS
(SEE DETAIL A)
DETAIL A
(JEDEC 95)
SEATING
PLANE
PIN 1
INDICATOR
AREA
Figure 66. 56-Lead Lead Frame Chip Scale Package [LFCSP]
8 mm × 8 mm Body and 0.75 mm Package Height
(CP-56-16)
Dimensions shown in millimeters
ORDERING GUIDE
Model1
Temperature Range
Package Description
Package Option
ADRF6821ACPZ
−40°C to +105°C
56-Lead Lead Frame Chip Scale Package [LFCSP]
CP-56-16
ADRF6821ACPZ-RL7
−40°C to +105°C
56-Lead Lead Frame Chip Scale Package [LFCSP], Reel
CP-56-16
ADRF6821-EVALZ
Evaluation Board
1
Z = RoHS Compliant Part.
©2017–2018 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D14807-0-8/18(A)



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