TLE8082ES datasheet(33/61 Pages) INFINEON

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Table 22

Watchdog state machine transitions (continued)

State

Event or condition

for transition to

target state

Target state

Notes

Wait for WD command WD command

received OR watchdog

period timer expired

Timing and command

check

Timing and command

check

WDC=10B AND WD

command inside open

window

Decrement WD error

counter

Timing and command

check

WDC≠10B OR WD

command outside

open window

Increment WD error

counter

Decrement WD error

counter

not event triggered

Start watchdog period no condition or event needed for

transition, only decrement must be

performed for automatic transition

Increment WD error

counter

not event triggered

Start watchdog period no condition or event needed for

transition, only increment must be

performed for automatic transition

6.5

Watchdog error counter

The device implements a 3 bits error counter EC located in the register WD. This corresponds to a counting

range from 0D (000B) to 7D (111B).

The actual counter value can be read via SPI.

The status of the error counter EC defines the state of the device.

•

Ready state: EC < 5D

•

Safe state: EC > 4D

A watchdog reset is generated by an overflow of the error counter EC. For more information about the Reset

state of the watchdog, see Chapter 4.1.5.

TLE8082ES

Small engine management IC

Watchdog

Datasheet

Rev. 1.0

2021-03-23

TLE8082ES 데이터시트(PDF) 33 Page - Infineon Technologies AG

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