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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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MPF7100BVMA2ES 데이터시트(PDF) 37 Page - NXP Semiconductors |
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MPF7100BVMA2ES 데이터시트(HTML) 37 Page - NXP Semiconductors |
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37 / 125 page  NXP Semiconductors PF7100 7-channel power management integrated circuit for high performance applications PF7100 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2021. All rights reserved. Product data sheet Rev. 4 — 9 March 2021 37 / 125 aaa-028059 RESETBMCU REG4_PG REG3_PG REG2_PG SYSTEM ON REG4 REG3 REG2 REG1_PG REG1 PGOOD (optional) Figure 15. Correct power up (no fault during power up) If any of the regulators are powered up before RESETBMCU is out of regulator, RESETBMCU is not de-asserted and the power up sequence is stopped for up to 2.0 ms. If the fault is cleared and all internal PG signals are asserted within the 2.0 ms timer, RESETBMCU is de-asserted and the power up sequence continues where it stopped as shown in Figure 16. |
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