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MPF7100BVMA2ES 데이터시트(PDF) 52 Page - NXP Semiconductors

부품명 MPF7100BVMA2ES
상세설명  7-channel power management integrated circuit for high performance applications
PDF  125 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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MPF7100BVMA2ES 데이터시트(HTML) 52 Page - NXP Semiconductors

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NXP Semiconductors
PF7100
7-channel power management integrated circuit for high performance applications
PF7100
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 4 — 9 March 2021
52 / 125
aaa-029212
100 µs
PWRON
FAULT EVENT
EWARN
MASTER
PMIC
SLAVE
PMIC
XFAILB
POWER DOWN
signal
POWER DOWN
sequence
POWER UP
sequence
EWARN
XFAILB
POWER DOWN
signal
POWER DOWN
sequence
POWER UP
sequence
20 µs
20 µs
pin externally pulled down
dual PMIC interaction
(fault on master PMIC)
slave ready to start power
up sequence (waiting)
XFAILB
debounced
power up sequence is started
until both XFAILB are pulled high
Figure 21. Behavior during an external XFAILB event
aaa-029213
MASTER
PMIC
SLAVE
PMIC
PWRON
POWER UP
sequence
POWER DOWN
signal
RESETBMCU
XFAILB
POWER UP
sequence
POWER DOWN
signal
2 ms
slave ready to start pwer up
sequence (waiting)
pin externally
pulled down
XFAILB during power up
sequence
power up sequence is restarted
until both XFAILB are pulled high
XFAILB
Figure 22. External XFAILB event during a power up sequence
14.9.14 SDA and SCL (I2C bus)
Communication with the PF7100 is done through I2C and it supports high-speed
operation mode with up to 3.4 MHz operation. SDA and SCL are pulled up to VDDIO with
1.5 kΩ resistor if 3.4 MHz I2C speed is required.



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