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AT25SF641 데이터시트(PDF) 62 Page - Dialog Semiconductor

부품명 AT25SF641
상세설명  64-Mbit, 2.7V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O and QPI Support
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AT25SF641
DS-25SF641–111E–3/2018
7.36
Enter Secured OTP (B1h)
The Enter Secured OTP instruction is for entering the additional 4K-bit secured OTP mode. The additional 4K-bit
secured OTP is independent from main array, which may be used to store unique serial number for system identifier.
After entering the Secured OTP mode, and then follow standard read or program, procedure to read out the data or
update data. The Secured OTP data cannot be updated again once it is lock-down
Please note that Write Status Register-1, Write Status Register-2 and Write Security Register instructions are not
acceptable during the access of secure OTP region. Once security OTP is lock down, only commands related with read
are valid. The Enter Secured OTP instruction sequence is shown in Figure 7-59.
Table 7-11.
SFDP Parameters Table 2
Description
Comment
Address
(h) Byte
Address
(Bit)
Data (b)
(Bit)
Data (h)
(Byte)
VCC Minimum Voltage
1650h: 1.65V,
1700h: 1.70V,
2300h: 2.30V,
2500h: 2.50V,
2700h: 2.70V
80h
81h
15:0
0000 0000
0001 0111
00h
27h
VCC Maximum Voltage
1950h: 1.95V,
3600h: 3.60V,
4000h: 4.00V,
4400h: 4.40V
82h
83h
31:16
0000 0000
0011 0110
00h
36h
Array Protection Method
10b: use non-volatile
status register
84h
85h
01:00
10
DAh
06h
Power up Protection default
0: power up unprotected,
1: power up protected
02
0
Protection Disable Opcodes
011b: use status register
05:03
01 1
Protection Enable Opcodes
011b: use status register
08:06
0 11
Protection Read Opcodes
011b: use status register
11:09
011
Protection Register Erase
Opcode
00b: not supported,
01b: Opcodes
3Dh,2Ah,7Fh,CFh,
13:12
00
Protection Register Program
Opcode
00b: not supported,
01b: Opcodes
3Dh,2Ah,7Fh,FCh
15:14
00
Reserved
FFh
86h
23:16
1111 1111
FFh
Reserved
FFh
87h
31:24
1111 1111
FFh
Reserved
FFh
88h-FFh
Reserved



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