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DA9072

Ultra-Low Quiescent Current PMIC

Datasheet

Revision 3.0

14-Jun-2021

CFR0011-120-00

47 of 113

VDD_PWR

VVDD_PWR_OVP

PWR_FLT

VVDD_PWR_UVLO

Figure 30: PWR_FLT Configured as VDD_PWR Status Indicator

The SYS_FLT output indicates interrupt events with a 128 µs pulse and can be configured to indicate

charging in progress. SYS_FLT is configured by SYS_FLT_MODE (register 0x0011 [0]), see Table

38.

Table 38: SYS_FLT Configuration

SYS_FLT_MODE Setting

Charge Indicator

IRQ Interrupt Polarity

Disabled

Active-low

SYS_FLT low when

charge in progress

Active-low when charge is not in-progress

Active-high when charge is in-progress

The SYS_FLT interrupt flag can be masked for each individual interrupt by setting its mask bit to 1.

Mask registers, SYS_IMR_<n>, are at registers 0x0008 through 0x000C. Masking an interrupt masks

the SYS_FLT flag but does not mask the event bit.

Once an interrupt has occurred, the SYS_FLT flag does not toggle a second time for the same

interrupt. The event bit must first be read cleared before SYS_FLT responds to that event again.

4.8.4

Pushbutton Reset Timer and Reset Output

The RIN_N input can be used to manually control DA9072 in Ship mode, Hi-Z mode, or when the

host has stalled. The pin has three functions: enter/exit Ship mode, enter Hi-Z mode, and toggle the

ROUT_N reset output. RIN_N is active in all modes of operation. The pin is internally pulled high and

can be pulled directly to ground with an external pushbutton to activate the timer.

When RIN_N is pulled low, a reset timer begins counting. There are three programmable RIN_N

timers; each associated with an event bit. Each time the RIN_N timer passes the programmable

count the SYS_FLT flag toggles, and a WAKE event bit is set. In this way, requests to the host can

be generated by pressing the button for different durations. The first two timers are WAKE1 and

WAKE2; the third timer is the RESET timer. If RIN_N is held low for the set RESET time, the DA9072

can be set to enter Ship mode, enter Hi-Z, or initiate a power cycle. The WAKE and RESET periods

are set as shown in Table 39.

Table 39: RIN_N Pushbutton Wake-Up Timer Control

Timer Name

Timer Control Bits

Programmable Period

WAKE1

RIN_N_PER_WAKE1

0x0010 [4]

50 ms

500 ms

WAKE2

RIN_N_PER_WAKE2

0x0010 [5]

1.0 s

1.5 s

RESET

RIN_N_PER_RST

0x0010 [7:6]

4 s

8 s

10 s

14 s

The timer status bits,ISR_RIN_N_WAKE2, ISR_RIN_N_WAKE1, and ISR_RIN_N_RST, are at

0x0007. As with all other events, the SYS_FLT flag can be masked. The RIN_N timing is described

in Figure 31.

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