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PCF8564A 데이터시트(PDF) 25 Page - NXP Semiconductors

부품명 PCF8564A
상세설명  Nano-power highly accurate RTC with integrated quartz crystal for automotive applications
PDF  86 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

PCF8564A 데이터시트(HTML) 25 Page - NXP Semiconductors

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NXP Semiconductors
PCA2131
Nano-power highly accurate RTC with integrated quartz crystal for automotive applications
001aaj326
minimum 2000 ns
minimum 500 ns
8 ms
power up
SCL
reset override
SDA/CE
Figure 11. Power-On Reset Override (PORO) sequence, valid for both I2C-bus and SPI-bus
Once the override mode is entered, the device is immediately released from the reset
state and the set-up operation can commence.
The PORO mode is cleared by writing logic 0 to POR_OVRD. POR_OVRD must be logic
1 before a re-entry into the override mode is possible. Setting POR_OVRD logic 0 during
normal operation has no effect except to prevent accidental entry into the PORO mode.
7.8 Software Reset register
Bit
7
6
5
4
3
2
1
0
Symbol
CPR
0
1
0
SR
1
0
CTS
Section
Section 7.8.2
Section 7.8.1
Section 7.8.3
Table 24. Reset - software reset control (address 05h) bit description
To
• trigger a software reset (SR), 0010 1100 (2Ch) must be sent to register Reset (address
05h). A software reset also triggers CPR and CTS
• clear prescaler (CPR), 1010 0100 (A4h) must be sent to register Reset (address 05h)
• clear timestamp (CTS), 0010 0101 (25h) must be sent to register Reset (address 05h)
It is possible to combine CPR and CTS by sending 1010 0101 (A5h).
Read of the SR_RESET register will return a fixed pattern of 00100100;
Remark: Any other value sent to this register is ignored.
7.8.1 SR - Software reset
A reset is automatically generated at power-on as Power-On Reset as described in
Section 7.7. A reset can also be initiated with the software reset command.
After software reset, the following mode is entered:
• 32.768 kHz CLKOUT active
• Power-On Reset Override (PORO) unchanged
• OTP not reloaded, OTPR unchanged.
• 24-hour mode is selected
• Battery switch-over function disabled, only one power supply (VDD)
• Temperature compensation enabled
• 100th second enabled
• Time 00:00:00.00
• Date 2001.01.01
PCA2131
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2021. All rights reserved.
Product data sheet
Rev. 1.0 — 26 July 2021
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