DS31256_V01 datasheet(79/183 Pages) MAXIM

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DS31256 256-Channel, High-Throughput HDLC Controller

79 of 183

the data that is currently present in the RFHWM register and write it to the channel location indicated by the HCID

bits. When the device has completed the write, the IAB is set to 0.

Bit 15/Indirect Access Busy (IAB). When an indirect read or write access is in progress, this read-only bit is set

to 1. During a read operation, this bit is set to 1 until the data is ready to be read. It is set to 0 when the data is

ready to be read. During a write operation, this bit is set to 1 while the write is taking place. It is set to 0 once the

write operation has completed.

RFHWM

Receive FIFO High Watermark

0924h

Bit #

Name

RHWM7

RHWM6

RHWM5

RHWM4

RHWM3

RHWM2

RHWM1

RHWM0

Default

Bit #

Name

n/a

RHWM9

RHWM8

Default

Note: Bits that are underlined are read-only; all other bits are read-write.

Bits 0 to 9/High Watermark (RHWM0 to RHWM9). These bits indicate the setting of the receive high-

watermark. The high-watermark setting is the number of successive blocks that the HDLC controller writes to the

FIFO before the DMA sends the data to the PCI bus. The high-watermark setting must be between (inclusive) one

block and one less than the number of blocks in the link-list chain for the particular channel involved. For

example, if four blocks are linked together, the high watermark can be set to either 1, 2, or 3. In other words, the

high watermark can be set to a value of 1 to N - 1, where N = number of block linked together. Any other numbers

are illegal.

0000000000 (000h) = invalid setting

0000000001 (001h) = high watermark is 1 block

0000000010 (002h) = high watermark is 2 blocks

0111111111 (1FFh) = high watermark is 511 blocks

1111111111 (3FFh) = high watermark is 1023 blocks

TFSBPIS

Transmit FIFO Starting Block Pointer Indirect Select

0980h

Bit #

Name

HCID7

HCID6

HCID5

HCID4

HCID3

HCID2

HCID1

HCID0

Default

Bit #

Name

IAB

IARW

n/a

Default

Note: Bits that are underlined are read-only; all other bits are read-write.

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