MAX9673

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Page 4

V. Quality Assurance Information

A. Quality Assurance Contacts:

Richard Aburano (Manager, Reliability Engineering)

Don Lipps (Manager, Reliability Engineering)

Bryan Preeshl (Vice President of QA)

B. Outgoing Inspection Level:

0.1% for all electrical parameters guaranteed by the Datasheet.

0.1% For all Visual Defects.

C. Observed Outgoing Defect Rate:

< 50 ppm

D. Sampling Plan:

Mil-Std-105D

VI. Reliability Evaluation

A. Accelerated Life Test

The results of the 135C biased (static) life test are shown in Table 1. Using these results, the Failure Rate (

) is calculated as follows:

=

1

=

1.83

(Chi square value for MTTF upper limit)

MTTF

192 x 4340 x 48 x 2

(where 4340 = Temperature Acceleration factor assuming an activation energy of 0.8eV)

= 22.9 x 10

-9

= 22.9 F.I.T. (60% confidence level @ 25°C)

The following failure rate represents data collected from Maxim's reliability monitor program. Maxim performs quarterly life test

monitors on its processes. This data is published in the Reliability Report found at http://www.maxim-ic.com/qa/reliability/monitor.

Cumulative monitor data for the S45 Process results in a FIT Rate of 0.06 @ 25C and 1.00 @ 55C (0.8 eV, 60% UCL)

B. E.S.D. and Latch-Up Testing

The DV26 die type has been found to have all pins able to withstand a transient pulse of:

ESD-HBM:

+/- 2500V per JEDEC JESD22-A114 (lot TYXZAQ001E, D/C 0924)

ESD-CDM:

+/- 750V per JEDEC JESD22-C101 (lot TYXZAQ001E, D/C 0924)

ESD-MM:

+/- 250V per JEDEC JESD22-A115 (lot TYXZAQ001B, D/C 0924)

Latch-Up testing has shown that this device withstands a current of +/- 250mA and overvoltage per JEDEC JESD78 (lot

TYXZAQ001D, D/C 0924).