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P87LPC779FDH 데이터시트(PDF) 67 Page - NXP Semiconductors |
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P87LPC779FDH 데이터시트(HTML) 67 Page - NXP Semiconductors |
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67 / 74 page ![]() Philips Semiconductors P87LPC779 CMOS single-chip 8-bit microcontroller Product data Rev. 02 — 03 May 2004 67 of 74 9397 750 13213 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. [1] Conditions: VSS =0V; VDD = 5.12 V. [2] The A/D is monotonic, there are no missing codes. [3] The differential non-linearity (DLe) is the difference between the actual step width and the ideal step width. See Figure 28. [4] The integral non-linearity (ILe) is the peak difference between the center of the steps of the actual and the ideal transfer curve after appropriate adjustment of gain and offset errors. See Figure 28. [5] The offset error (OSe) is the absolute difference between the straight line which fits the actual transfer curve (after removing gain error), and the straight line which fits the ideal transfer curve. See Figure 28. [6] The gain error (Ge) is the relative difference in percent between the straight line fitting the actual transfer curve (after removing offset error), and the straight line which fits the ideal transfer curve. Gain error is constant at every point on the transfer curve. See Figure 28. [7] The absolute voltage error (Ae) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated ADC and the ideal transfer curve. [8] This should be considered when both analog and digital signals are input simultaneously to A/D pins. [9] Changing the input voltage faster than this may cause erroneous readings. [10] A source impedance higher than this driving an A/D input may result in loss of precision and erroneous readings. Table 56: A/D converter DC electrical characteristics VDD = 2.7 V to 5.5 V unless otherwise specified. Tamb = −40 °C to +85 °C for extended industrial, unless otherwise specified. Symbol Parameter Conditions Min Max Unit AVIN Analog input voltage VSS − 0.2 VDD + 0.2 V CIA Analog input capacitance - 15 pF DLe Differential non-linearity[1][2][3] - ±1 LSB ILe Integral non-linearity[1][4] - ±1 LSB OSe Offset error[1][5] - ±1 LSB Ge Gain error[1][6] - ±0.4 % Ae Absolute voltage error[1][7] - ±1 LSB MCTC Channel-to-channel matching - ±1 LSB Ct Crosstalk between inputs of port[8] 0 to 100 kHz - −60 dB - Input slew rate - 100 V/ms - Input source impedance - 10 k Ω |
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