MMPF0200Z datasheet(95/118 Pages) NXP

95 / 118 page

Analog Integrated Circuit Device Data



Freescale Semiconductor

PF0200Z

Functional Block Requirements and Behaviors

Control Interface I2C Block Description

6.5.5.2

Embedded Memory

There are four register banks of general purpose embedded memory to store critical data. The data written to MEMA[7:0],

MEMB[7:0], MEMC[7:0], and MEMD[7:0] is maintained by the coin cell when the main battery is deeply discharged, removed, or

contact-bounced. The contents of the embedded memory are reset by COINPORB. The banks can be used for any system need

for bit retention with coin cell backup.

6.5.6

The register map is comprised of thirty-two pages, and its address and data fields are each eight bits wide. Only the first two

pages can be accessed. On each page, registers 0 to 0x7F are referred to as 'functional', and registers 0x80 to 0xFF as

'extended'. On each page, the functional registers are the same, but the extended registers are different. To access registers on

Extended Page 1, one must first write 0x01 to the page register at address 0x7F, and to access registers Extended Page 2, one

must first write 0x02 to the page register at address 0x7F. To access the Functional Page from one of the extended pages, no

write to the page register is necessary.

Registers that are missing in the sequence are reserved; reading from them will return a value 0x00, and writing to them will have

no effect.

The contents of all registers are given in the tables defined in this chapter; each table is structure as follows:

Name: Name of the bit.

Bit #: The bit location in the register (7-0)

R/W: Read / Write access and control

• R is read-only access

• R/W is read and write access

• RW1C is read and write access with write 1 to clear

Table 116. Register MEMA ADDR 0x1C

Name

Bit #

R/W

Default

Description

MEMA

7:0

R/W

Memory bank A

Table 117. Register MEMB ADDR 0x1D

Name

Bit #

R/W

Default

Description

MEMB

7:0

R/W

Memory bank B

Table 118. Register MEMC ADDR 0x1E

Name

Bit #

R/W

Default

Description

MEMC

7:0

R/W

Memory bank C

Table 119. Register MEMD ADDR 0x1F

Name

Bit #

R/W

Default

Description

MEMD

7:0

R/W

Memory bank D

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