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AS3977

Data Sheet - A p p l i c a t i o n I n f o r m a t i o n

9.2.2 Power On Reset

For stable start up of the AS3977 and to avoid unwanted crystal oscillation, it is strongly recommended to perform a power on reset (Hardware

Reset Method). This can be performed as described in Table 19 and must be carried out every time when the supply voltage is less than the

minimum allowed value (see Operating Conditions on page 8).

9.2.3 Writing of Data to Addressable Registers

When the Power Down Mode is left, the level of CLK at the rising edge of ENABLE determines the sampling edge of CLK. If CLK is low, when

ENABLE rises, DATAI is sampled at the falling edge of CLK (see Figure 8 and Figure 9), if CLK is high when ENABLE rises, DATAI is sampled at

the rising edge of CLK.

An Enable LOW pulse indicates the end of the WRITE command after register has been written.

Figure 8 illustrates a write command in which the initialization of DATAIO take over condition is done at the falling edge of CLK signal.

Figure 8. Writing of a Single Byte (falling edge sampling)

Table 19. Power On Reset

Step

Hardware Reset Method

1

Apply Power to the AS3977

2

Apply Enable high pulse (Low-High-Low transition)

3

Power on reset complete after xtal start up + 2

CLK

ENABLE

A5

A4

A3

A2

A1

A0

1

0

D7

D6

D5

D4

D3

D2

D1

D0

DATAIO

In case the ENABLE line has been longer than

2

determined here

Data D7 is sam-

pled from AS3977

at this edge

ENABLE falling edge sig-

nals end of write

Enable low must be shorter than 2

conditions and the data takeover condition

Data D4 is trans-

ferred from

Microcontroller

Data D7-D0 is

moved to

Address A5-

A0 here