AS3933 datasheet(48/64 Pages) AMSCO

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[v1-08] 2015-Sep-02

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AS3933 − Detailed Description

Manchester Decoder and Clock Recovery

In case the Manchester decoder is enabled (R1<3>=1) the

AS3933 decodes the incoming Manchester bits automatically

and the Manchester decoded data are displayed on the DAT pin

and the Manchester recovered clock on the CL_DAT. The data

coming out from the DAT pin are stable (and therefore can be

acquired) on the rising edge of the CL_DAT clock, as shown in

Figure 54.

Figure 54:

Synchronization of Data with the Manchester Recovered Clock

In case a Manchester timing violation happens, the signal on

SPO goes high for a duration of 4 periods of internal clock

(either crystal oscillator or RCO or external clock).

False Wake-Up Register

The wake-up strategy in the AS3933 is based on 2 steps:

Frequency Detection: In this phase the frequency of the

received signal is checked.

Pattern Correlation: Here the pattern is demodulated

and checked whether it corresponds to the valid one.

If there is a disturber or noise capable to overcome the first step

(frequency detection) without producing a valid pattern, then

a false wake-up call happens. Each time this event is recognized

a counter is incremented by one and the respective counter

value is stored in a memory cell (false wake-up register). Thus,

the microcontroller can periodically look at the false wake-up

environment is and can then react accordingly (e.g. reducing

the gain of the LNA during frequency detection, set the AS3933

temporarily to power down etc.), as shown in the Figure 55. The

false wake-up counter is a useful tool to quickly adapt the

system to any changes in the noise environment and thus avoid

false wake-up events.

CL_DAT

DAT

AS3933 데이터시트(PDF) 48 Page - ams AG