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TMUX7462F 데이터시트(PDF) 3 Page - Texas Instruments

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부품명 TMUX7462F
상세설명  TMUX7462F 짹60 V Fault-Protected, Latch-Up Immune, Quad Channel Protector with Adjustable Fault Threshold and 1.8-V Logic
PDF  37 Pages
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제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
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5 Pin Configuration and Functions
1
VFN
16
VFP
2
D1
15
D2
3
S1
14
S2
4
VSS
13
VDD
5
GND
12
FF
6
S4
11
S3
7
D4
10
D3
8
DR
9
NC
Not to scale
Figure 5-1. (Preview) PW Package
16-Pin TSSOP, Top View
1
S1
12
S2
2
VSS
11
VDD
3
GND
10
FF
4
S4
9
S3
Not to scale
Thermal
Pad
Figure 5-2. RRP Package
16-Pin WQFN, Top View
Table 5-1. Pin Functions
PIN
TYPE(1)
DESCRIPTION
NAME
TSSOP
WQFN
D1
2
16
I/O
Drain pin 1 can be an input or output. The drain pin is not overvoltage protected and shall remain within the
recommended operating range.
D2
15
13
I/O
Drain pin 2 can be an input or output. The drain pin is not overvoltage protected and shall remain within the
recommended operating range.
D3
10
8
I/O
Drain pin 3 can be an input or output. The drain pin is not overvoltage protected and shall remain within the
recommended operating range.
D4
7
5
I/O
Drain pin 4 can be an input or output. The drain pin is not overvoltage protected and shall remain within the
recommended operating range.
DR
8
6
I
Drain Response (DR) input. Tying the DR pin to GND enables the drain to be pulled to VFP or VFN through
a 40 kΩ resistor during an overvoltage fault event. The drain pin becomes open circuit when the DR pin is a
logic high or left floating.
FF
12
10
O
General fault flag. This pin is an open drain output and is asserted low when overvoltage condition is
detected on any of the source (Sx) pins. Connect this pin to an external supply (1.8 V to 5.5 V) through a 1
kΩ pull-up resistor.
GND
5
3
P
Ground (0 V) reference.
N.C.
9
7
No internal connection
S1
3
1
I/O
Overvoltage protected source pin 1 can be an input or output.
S2
14
12
I/O
Overvoltage protected source pin 2 can be an input or output.
S3
11
9
I/O
Overvoltage protected source pin 3 can be an input or output.
S4
6
4
I/O
Overvoltage protected source pin 4 can be an input or output.
VDD
13
11
P
Positive power supply. This pin is the most positive power-supply potential. Connect a decoupling capacitor
ranging from 0.1 µF to 10 µF between VDD and GND for reliable operation.
VFP
16
14
P
Positive fault voltage supply that determines the overvoltage protection triggering threshold on the positive
side. Connect to VDD if the triggering threshold is the same as the device's positive supply. Connect a
decoupling capacitor ranging from 0.1 µF to 10 µF between VFP and GND for reliable operation.
VFN
1
15
P
Negative fault voltage supply that determines the overvoltage protection triggering threshold on the negative
side. Connect to VSS if the triggering threshold is the same as the device's negative supply. Connect a
decoupling capacitor ranging from 0.1 µF to 10 µF between VFN and GND for reliable operation.
VSS
4
2
P
Negative power supply. This pin is the most negative power-supply potential. This pin can be connected to
ground in single-supply applications. Connect a decoupling capacitor ranging from 0.1 µF to 10 µF between
VSS and GND for reliable operation.
Thermal Pad
The thermal pad is not connected internally. No requirement to solder this pad. For best performance it is
recommended that the pad be tied to GND or VSS.
(1)
I = input, O = output, I/O = input and output, P = power.
www.ti.com
TMUX7462F
SCDS394A – MARCH 2021 – REVISED OCTOBER 2021
Copyright © 2021 Texas Instruments Incorporated
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Product Folder Links: TMUX7462F



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