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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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STM32WB10CC 데이터시트(PDF) 18 Page - STMicroelectronics |
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STM32WB10CC 데이터시트(HTML) 18 Page - STMicroelectronics |
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18 / 110 page  Functional overview STM32WB10CC 18/110 DS13259 Rev 2 Figure 2. STM32WB10CC RF front-end block diagram 3.6.2 BLE general description The BLE block is a master/slave processor, compliant with Bluetooth specification 5.2 standard (1 Mbps). It integrates a 2.4 GHz RF transceiver and a powerful Cortex®-M0+ core, on which a complete power-optimized stack for Bluetooth Low Energy protocol runs, providing master / slave role support GAP: central, peripheral, observer or broadcaster roles ATT/GATT: client and server SM: privacy, authentication and authorization L2CAP Link layer: AES-128 encryption and decryption MS53574V1 Note: UFQFPN48: VSS through exposed pad, and VSSRF pin must be connected to ground plane BP filter PLL RF1 Adjust 32 MHz OSC_OUT OSC_IN BLE modulator BLE demodulator BLE controller RF control AGC Timer and Power control LDO LDO LDO VDD Trimmed bias VDDRF Max PA level Adjust HSE G G LNA Wakeup Interrupt AHB APB See note RF_TX_ MOD_ EXT_PA |
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