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STM8L051F3 데이터시트(PDF) 91 Page - STMicroelectronics |
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STM8L051F3 데이터시트(HTML) 91 Page - STMicroelectronics |
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91 / 96 page ![]() DS9178 Rev 4 91/96 STM8L051F3 Package characteristics 93 Device marking for TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch The following figure gives an example of topside marking orientation versus pin 1/ball A1 identifier location. Other optional marking or inset/upset marks, which identify the parts throughout supply chain operations, are not indicated below. Figure 40. Device marking for TSSOP20 – 20-lead thin shrink small outline, 6.5 x 4.4 mm, 0.65 mm pitch example 1. Parts marked as ES or E or accompanied by an Engineering Sample notification letter are not yet qualified and therefore not approved for use in production. ST is not responsible for any consequences resulting from such use. In no event will ST be liable for the customer using any of these engineering samples in production. ST's Quality department must be contacted prior to any decision to use these engineering samples to run a qualification activity. MSv17034v1 8L051F3P6 R Y WW Product identification Additional information Date code Unmarkable surface PIN1 reference |
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