ATAR080 datasheet(38/68 Pages) ATMEL

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ATAR080

4675D–4BMCU–12/04

Duty Cycle Generator

The duty cycle generator generates duty cycles from 25%, 33% or 50%. The frequency

at the duty cycle generator output depends on the duty cycle and the Timer 2 prescaler

setting. The DCG-stage can also be used as an additional programmable prescaler for

Timer 2.

Figure 42. DCG Output Signals

T2MS1

Timer 2 Mode Select bit 1

T2MS0

Timer 2 Mode Select bit 0

Table 17. Timer 2 Mode Select Bits

Mode

T2MS1

T2MS0

Clock Output (POUT)

Timer 2 Modes

4-bit counter overflow (OVF1)

12-bit compare counter, the

DCG have to be bypassed in

this mode

4-bit compare output (CM1)

8-bit compare counter with

4-bit programmable prescaler

and duty cycle generator

4-bit compare output (CM1)

8-bit compare counter clocked

by SYSCL or the external

clock input T2I, 4-bit prescaler

run, the counter 2/1 starts after

writing mode 3

4-bit compare output (CM1)

8-bit compare counter clocked

by SYSCL or the external

clock input T2I, 4-bit prescaler

stop and resets

DCGIN

DCGO0

DCGO1

DCGO2

DCGO3

ATAR080 데이터시트(PDF) 38 Page - ATMEL Corporation

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