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WM8940CGEFL/V 데이터시트(PDF) 53 Page - Cirrus Logic

부품명 WM8940CGEFL/V
상세설명  Mono CODEC with Speaker Driver
PDF  88 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

WM8940CGEFL/V 데이터시트(HTML) 53 Page - Cirrus Logic

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WM8940
Rev 4.4
53
LEFT CHANNEL
RIGHT CHANNEL
LRC
BCLK
DACDAT /
ADCDAT
n
3
2
1
n-2 n-1
LSB
MSB
n
3
2
1
n-2 n-1
1 BCLK
Input Word Length (WL)
1/fs
falling edge can occur anywhere in this area
1 BCLK
Figure 29 DSP/PCM Mode Audio Interface (Mode B, FRAMEP=1)
AUDIO INTERFACE CONTROL
The register bits controlling audio format, word length and master / slave mode are summarised
below.
Register bit MS selects audio interface operation in master or slave mode. In Master mode BCLK, and
FRAME are outputs. The frequency of BCLK and FRAME in master mode are controlled with
BCLKDIV. These are divided down versions of master clock. This may result in short BCLK pulses at
the end of a frame if there is a non-integer ratio of BCLKs to FRAME clocks.
REGISTER
ADDRESS
BIT
LABEL
DEFAULT
DESCRIPTION
R4
Audio interface
control
9
LOUTR
0
LOUTR control
0=normal
1=Input mono channel data output on
both left and right channels
8
BCP
0
BCLK polarity
0=normal
1=inverted
7
FRAMEP
0
Frame clock polarity (for RJ, LJ and I2S
formats)
0=normal
1=inverted
DSP Mode control
1 = Configures interface so that MSB is
available on 1st BCLK rising edge after
FRAME rising edge
0 = Configures interface so that MSB is
available on 2nd BCLK rising edge after
FRAME rising edge
6:5
WL
10
Word length
00 = 16 bits
01 = 20 bits
10 = 24 bits
11 = 32 bits (see note)
4:3
FMT
10
Audio interface Data Format Select:
00=Right Justified
01=Left Justified
10=I2S format
11= DSP/PCM mode



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