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HT46R71D 데이터시트(PDF) 13 Page - Holtek Semiconductor Inc

부품명 HT46R71D
상세설명  A/D with LCD Type 8-Bit MCU
PDF  46 Pages
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제조업체  HOLTEK [Holtek Semiconductor Inc]
홈페이지  http://www.holtek.com
Logo HOLTEK - Holtek Semiconductor Inc

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HT46R71D
Rev. 1.00
13
January 9, 2006
Buzzer Output
The Buzzer function provides a means of producing a
variable frequency output, suitable for applications such
as Piezo-buzzer driving or other external circuits that re-
quire a precise frequency generator. The BZ and BZ
pins form a complimentary pair, and are pin-shared with
I/O pins, PA0 and PA1. A configuration option is used to
select from one of three buzzer options. The first option
is for both pins PA0 and PA1 to be used as normal I/Os,
the second option is for both pins to be configured as BZ
and BZ buzzer pins, the third option selects only the PA0
pin to be used as a BZ buzzer pin with the PA1 pin re-
taining its normal I/O pin function. Note that the BZ pin is
the inverse of the BZ pin which together generate a dif-
ferential output which can supply more power to con-
nected interfaces such as buzzers.
The buzzer is driven by the internal clock source, fS,
which then passes through a divider, the division ratio of
which is selected by configuration options to provide a
range of buzzer frequencies from fS/2
2 to f
S/2
9. The
clock source that generates fS, which in turn controls the
buzzer frequency, can originate from two different
sources, the Int.RCOSC (Internal RC oscillator) or the
System oscillator/4, the choice of which is determined
by the fS clock source configuration option. Note that the
buzzer frequency is controlled by configuration options,
which select both the source clock for the internal clock
fS and the internal division ratio. There are no internal
registers associated with the buzzer frequency.
If the configuration options have selected both pins PA0
and PA1 to function as a BZ and BZ complementary pair
of buzzer outputs, then for correct buzzer operation it is
essential that both pins must be setup as outputs by set-
ting bits PAC0 and PAC1 of the PAC port control regis-
ter to zero. The PA0 data bit in the PA data register must
also be set high to enable the buzzer outputs, if set low,
both pins PA0 and PA1 will remain low. In this way the
single bit PA0 of the PA register can be used as an
on/off control for both the BZ and BZ buzzer pin outputs.
Note that the PA1 data bit in the PA register has no con-
trol over the BZ buzzer pin PA1.
If configuration options have selected that only the PA0
pin is to function as a BZ buzzer pin, then the PA1 pin
can be used as a normal I/O pin. For the PA0 pin to func-
tion as a BZ buzzer pin, PA0 must be setup as an output
by setting bit PAC0 of the PAC port control register to
zero. The PA0 data bit in the PA data register must also
be set high to enable the buzzer output, if set low pin
PA0 will remain low. In this way the PA0 bit can be used
as an on/off control for the BZ buzzer pin PA0. If the
PAC0 bit of the PAC port control register is set high, then
pin PA0 can still be used as an input even though the
configuration option has configured it as a BZ buzzer
output.
Note that no matter what configuration option is chosen
for the buzzer, if the port control register has setup the
pin to function as an input, then this will override the con-
figuration option selection and force the pin to always
behave as an input pin. This arrangement enables the
pin to be used as both a buzzer pin and as an input pin,
so regardless of the configuration option chosen; the ac-
tual function of the pin can be changed dynamically by
the application program by programming the appropri-
ate port control register bit.
D i v i d e r
W D T P r e s c a l e r
M a s k O p t i o n
T i m e - o u t R e s e t
f W D T / 2 1 5 ~ f W D T / 2 1 6
f W D T / 2 1 4 ~ f W D T / 2 1 5
f W D T / 2 1 3 ~ f W D T / 2 1 4
f W D T / 2 1 2 ~ f W D T / 2 1 3
R O M
C o d e
O p t i o n
S y s t e m C l o c k / 4
I n t . R C O S C
f W D T
C K
R
T
C K
R
T
W D T C l e a r
Watchdog Timer
PAC Register
PAC.0
PAC Register
PAC.1
PA data Register
PA.0
PA data Register
PA.1
Output Function
0
0
0
X
PA0=0, PA1=0
0
0
1
X
PA0=BZ, PA1=BZ
0
1
0
X
PA0=0, PA1=Input
0
1
1
X
PA0=BZ, PA1=Input
1
0
0
X
PA0=Input, PA1=0
1
1
X
X
PA0=Input, PA1=Input
PA0/PA1 Pin Function Control
Note:
²X² stands for don¢t care



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