L9654 datasheet(37/59 Pages) STMICROELECTRONICS

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L9654

Functional description

may be connected to a single ADC input of a processor. If an AOUT is driven, the rest of

AOUT shall be driven to the high-impedance state.

Bit D6 through bit D4 select a specific channel, which is monitored. If AOUT output is

enabled, AOUT shall reflect the voltage on the selected channel. Also, SBTH and SGTH

status bits shall report the status of the respective channel. The decoding scheme of this

channel selection is shown in the following table. The default states of these bits are ‘0’

(channel 0 selected).

Table 20. Channel selection decoding

Bit D6

Bit D5

Bit D4

Channel selected

Bit D2

Bit D1

Bit D0

Don't’ Care

Bit D3 is used to calibrate AOUT. If this bit is set to ‘1’, AOUT pin contains the calibration

voltage. The processor can use this calibration voltage to make adjustment to the

subsequent resistance measurement reading. This is intended to improve the accuracy of

the resistance measurement. When this bit is set to ‘0’, AOUT pin contains the resistance

measurement results.

The default state of this bit is ‘0.’

4.11.5

Deployment driver monitor mode

Monitor Mode message is defined as shown in the following table.

Table 21. MOSI monitor mode message definition

Bit

State

Description

D15

Mode bits

D14

D13

Odd Parity

D12

Don’t Care

D11

Don’t Care

D10

Don’t Care

Report Deploy Success Flag (default)

Report Deployment OR Deploy Success Flag

Don’t Care

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