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L9654 데이터시트(PDF) 39 Page - STMicroelectronics

부품명 L9654
상세설명  Quad squib driver and dual sensor interface ASIC for safety application
PDF  59 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

L9654 데이터시트(HTML) 39 Page - STMicroelectronics

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L9654
Functional description
58
4.11.6
Deployment driver MISO bit definition
Table 22. MISO bit layout
MSB
LSB
D15
D14
D13 D12 D11 D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
MISO mode bits are defined as below table.
Table 23. MISO mode bits definition
Bit D15
Bit D14
Description
0
0
Register Mode Response
0
1
Command Mode Response
1
0
Diagnostic Mode Response
1
1
Status Response/SPI Fault Response
4.11.7
Deployment driver register mode response
Register Mode Response is the default response to the processor. After a POR event, a
RESETB negated, and a loss of GND, the device sends $0000 in MISO for the first SPI
transmission. Register Mode Response is defined as shown in the following table.
Table 24. MISO register mode response definition
Bit
State
Description
D15
0
Mode bits
D14
0
D13
0
Don’t Care
D12
-
Echo of MOSI Read/Write bit
D11
0
Pulse Stretch Timer Duration
1
Soft Reset Sequence
D10
0
Deployment Condition: IDEPLOY_12A and tDEPLOY_2ms
1
Deployment Condition: IDEPLOY_175A and tDEPLOY_1ms
D9
-
Pulse Stretch timer (see table 17)
D8
-
D7
-
Don’t Care
D6
-
Don’t Care
D5
-
Don’t Care
D4
-
Don’t Care
D3
-
Don’t Care
D2
1
Always 1
D1
-
Hard Reset Status
D0
-
Soft Reset Sequence Status



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