L9908 datasheet(53/153 Pages) STMICROELECTRONICS

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5.11.2.1

VBP functional ranges

Figure 27. VBP functional ranges

Where:

VBP ≤ VBP_uv _th

VBP is in under-voltage and L9908 is sent into the operating mode defined into the FMC registers. If set

as IMF a VBP UV event automatically sets CP1_EN = 0 bit, thus disabling the CP1 stage. If set to EMF,

protection mechanism is let to μC.

VBP_uv_th ≤ VBP ≤ VBP_cp1_lin_mode_th

L9908 is in NORMAL Mode (operative), CP1 regulates the target voltage on VPRE by working in charge

pump mode.

VBP_cp1_lin_mode_th ≤ VBP ≤ VBP_ov_th

L9908 is in NORMAL Mode (operative), CP1 regulates the target voltage on VPRE by working in linear

regulator mode.

VBP ≥ VBP_ov_th

VBP is in over-voltage and L9908 is sent into the operating mode defined into FMC registers.

5.11.3

VPRE monitor

VPRE voltage level is monitored by means of dedicated UV and an OV diagnosis. Hysteresis on thresholds and

filtering time is implemented.

If VPRE ≤ VPRE_uv_th occurs for an interval longer than T_vpre_uv_flt filtering time, the VPRE_UV flag is set.

The error flag remains set until the failure condition is removed and the flag is cleared by the SPI command.

If VPRE ≥ VPRE_ov_th occurs for an interval longer than T_vpre_ov_flt the VPRE_OV flag is set. The error

flag remains set until the failure condition is removed and the flag is cleared by the SPI command. The correct

operation Pre-Regulator stage monitor is safety relevant and then a self-check procedure is implemented.

To avoid UV/OV detection during power up phase VPRE monitor comparators are masked for a

T_vpre_boot_mask filtering time, starting from each low to high transition of the internal CP1 enabling command.

L9908

Gate driver supply

DS13546 - Rev 3

page 53/153

L9908 데이터시트(PDF) 53 Page - STMicroelectronics