L99LD21 datasheet(11/73 Pages) STMICROELECTRONICS

11 / 73 page

DS11130 Rev 5

11/73

L99LD21

Introduction

Figure 4. Connection diagram

Table 1. Pin functionality

Pin #

Name

Function

1V3V3

Output of the 3.3 V regulated internal supply. Connect a low ESR

capacitor (4.7 µF) close to this pin.

SYNC_I/O

Boost synchronization Input or Output. This pin generates the clock

signal for synchronizing another L99LD21 Boost in dual phase

configuration.

3CSN

Chip Select Not (active low) for SPI communication. It is the selection pin

of the device. It is a CMOS compatible input.

PWMCLK

Clock input for the internal PWM dimming generator.

SGND

Signal Ground connection.

SCK

Serial Clock for SPI communication. It is a CMOS compatible input.

VSPI

Connection to external 3.3 V or 5 V supplies voltage.

The external supply powers SPI interface and the I/O signal pins to the

microcontroller. It is suggested to connect 100nF capacitor close to this

pin.

8SDI

Serial Data Input for SPI communication. Data is transferred serially into

the device on SCK rising edge.

9SDO

Serial Data Output for SPI communication. Data is transferred serially

out of the device on SCK falling edge.

DIN

Direct input pin.

LX2F

Connection to the switching source node of the buck2. This pin must be

connected to external free-wheeling diode.

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