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L9788 데이터시트(PDF) 68 Page - STMicroelectronics |
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L9788 데이터시트(HTML) 68 Page - STMicroelectronics |
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68 / 264 page ![]() Multi-voltage regulator supplies L9788 68/264 DS12308 Rev 4 Figure 26. Boost threshold comparator's schematic 6.2 Pre-buck regulator with internal MOS Vpre features: 6 V regulated output voltage (VPRE); 1.6 A maximum output current; PWM block (ramp generator, comparator and main latch) with one fixed PWM frequency (Fsw_vpre); Internal error amplifier; Internal Power FET including Bootstrap; dV/dt Control on gate drivers to fulfill EMC requirements; Maximum Duty cycle 100%, to allow to charge Bootstrap capacitor; Protection by over temperature; Soft Start. The Vpre regulator is a buck regulator which supplies Pre-boost driver/VDD5/Vtrack1.2.3. When the OV of VB_IN is detected, the Vpre(Buck) will be switched off. This function is selectable by a dedicated MSC bit (VB_IN_OV_RST_EN in CONFIG_REG12). A bit is also available (BUCK_SLOW_SR in CONFIG_REG 21) in order to select slew rate for output voltage; the default value corresponds to fast slew rate, slow slew rate helps to improve emission performance The Vpre regulator includes a soft start. Range of dV/dt at VPRE is specified in electrical parameters. Pulse skipping mode: the Vpre regulator can go to pulse skipping mode when the load is too low to avoid that output voltage (VPRE) rises too much. The principle of the pulse skipping mode is to skip some pulses during the switching phase, when the loop can't keep itself the output voltage regulated with a very low load because it is limited by the minimum duty cycle. VB_IN_OV fault can trigger the turn OFF of Buck regulator, as specified into reset matrix. This effect can be masked with bit VB_IN_OV_RST_EN in CONFIG_REG 12. VBAT_sense R1 Vbg Vcomp_th1 R2 Vbg Vcomp_th2 R3 Vbg Vcomp_th3 R4 R5 EN Vbg Vcomp_th4 GADG2911161610PS |
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