L9788 datasheet(204/264 Pages) STMICROELECTRONICS

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Micro second channel (MSC) interface

L9788

204/264

DS12308 Rev 4

1: enabled (default)

[1] VB_IN_OV_RST_EN

Enable the contribution of VB_IN_OV on BUCK /VDD5/ VTRK regulator in the reset matrix

0: disabled

1: enabled (default)

[0] TNL_RST_EN

enable the RSTN activation for TNL time on the positive edge of KEY_IN

1: enable (default)

0: disable

18.5.13

CONFIG-REG 13

[7] IDIAG_HIGH_PDRV

Increase the currents required for pre-drivers off diagnosis.

0: I_LS_PU2 (40 µA (min) I_LS_PD1(60 µsA (min))

1: I_LS_PU3 (100 µA (min) I_LS_PD2(350 µsA (min)) (default)

[6] IDIAG_HIGH_SOL

Increase the currents required for Solenoids off diagnosis.

0: I_LS_PU2 (40 µA (min) I_LS_PD1(60 µsA (min))

1: I_LS_PU3 (100 µA (min) I_LS_PD2(350 µsA (min)) (default)

[5] IDIAG_HIGH_INJ

Increase the currents required for Solenoids off diagnosis.

0: I_LS_PU2 (40 µA (min) I_LS_PD1(60 µsA (min))

1: I_LS_PU3 (100 µA (min) I_LS_PD2(350 µsA (min)) (default)

[4] IPUPD_EN_STR3

CONFIG-

REG 13

1 0 1

0 1

WDA_PW

R_CNT_

OFF_DIS

IPUPD_

EN_STR

IPUPD_

EN_STR

IPUPD_

EN_STR

IDIAG_

HIGH_

INJ

IDIAG_

HIGH_S

IDIAG_

HIGH_P

DRV

DEFAULT

RESET SOURCE

D1:D7

v3v3a_ov, v3v3a_uv, v3v3d_ov, v3v3d_uv, vdd5_uv, vddio_uv, sw_reset,

after_run_reset, RSTN_IN

ACTIVATION

D1:D7 bits active as level

CONTROL ACCESS

D1 locked bit

D2:D7 not locked bits

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