CS47L35 datasheet(242/300 Pages) CIRRUS

242 / 300 page

242

DS1085F3

CS47L35

5.4 Digital Audio Interface Clocking Configurations

Fig. 5-17 shows AIF Slave Mode operation, using MCLK as the clock reference. For correct operation, the MCLK input

must be fully synchronized to the audio interface.

Figure 5-17. AIF Slave Mode, Using MCLK as Reference

Fig. 5-18 shows AIF Slave Mode operation, using MCLK as the clock reference. For correct operation, the MCLK input

must be fully synchronized to the audio interface. In this example, the FLL is used to generate the system clock, with MCLK

as the reference.

Figure 5-18. AIF Slave Mode, Using MCLK and FLL as Reference

Processor

AIFnBCLK

AIFnLRCLK

AIFnRXDAT

AIFnTXDAT

SYSCLK

SYSCLK_SRC

Synchronous

Clock Generator

AIFn

(Slave Mode)

AIFnBCLK

FLL1

SLIMCLK

CS47L35

AIFnBCLK

AIFnLRCLK

AIFnRXDAT

AIFnTXDAT

FLL1_REFCLK_SRC

FLL1

Processor

Synchronous

Clock Generator

SYSCLK

SYSCLK_SRC

AIFn

(Slave Mode)

AIFnBCLK

SLIMCLK

MCLK1

MCLK2

AIFnLRCLK

AIFnBCLK

SLIMCLK

CS47L35

CS47L35 데이터시트(PDF) 242 Page - Cirrus Logic

CS47L35 데이터시트(HTML) 242 Page - Cirrus Logic

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

데이터시트 다운로드

링크 URL