STM32H753II datasheet(138/361 Pages) STMICROELECTRONICS

138 / 361 page

Electrical characteristics (rev Y)

STM32H753xI

138/360

DS12117 Rev 8

Output voltage levels

Unless otherwise specified, the parameters given in Table 60 are derived from tests

performed under ambient temperature and VDD supply voltage conditions summarized in

Table 23: General operating conditions. All I/Os are CMOS and TTL compliant.

Table 60. Output voltage characteristics for all I/Os except PC13, PC14, PC15 and PI8(1)

Symbol

Parameter

Conditions(3)

Min

Max

Unit

VOL

Output low level voltage

CMOS port(2)

IIO=8 mA

2.7 V≤ VDD ≤3.6 V

-0.4

VOH

Output high level voltage

CMOS port(2)

IIO=-8 mA

2.7 V≤ VDD ≤3.6 V

VDD−0.4

VOL(3)

Output low level voltage

TTL port(2)

IIO=8 mA

2.7 V≤ VDD ≤3.6 V

-0.4

VOH(3)

Output high level voltage

TTL port(2)

IIO=-8 mA

2.7 V≤ VDD ≤3.6 V

2.4

VOL(3)

Output low level voltage

IIO=20 mA

2.7 V≤ VDD ≤3.6 V

-1.3

VOH(3)

Output high level voltage

IIO=-20 mA

2.7 V≤ VDD ≤3.6 V

VDD−1.3

VOL(3)

Output low level voltage

IIO=4 mA

1.62 V≤ VDD ≤3.6 V

-0.4

VOH (3)

Output high level voltage

IIO=-4 mA

1.62 V≤VDD<3.6 V

VDD−-0.4

VOLFM+(3)

Output low level voltage for an FTf

I/O pin in FM+ mode

IIO= 20 mA

2.3 V≤ VDD≤3.6 V

-0.4

IIO= 10 mA

1.62 V≤ VDD ≤3.6 V

-0.4

1. The IIO current sourced or sunk by the device must always respect the absolute maximum rating specified in Table 20:

Voltage characteristics, and the sum of the currents sourced or sunk by all the I/Os (I/O ports and control pins) must always

respect the absolute maximum ratings ΣIIO.

2. TTL and CMOS outputs are compatible with JEDEC standards JESD36 and JESD52.

3. Guaranteed by design.

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