FXPS7115D4 datasheet(26/75 Pages) NXP

26 / 75 page

NXP Semiconductors

FXPS7115D4

Digital absolute pressure sensor, 40 kPa to 115 kPa

a representation of the device status at the rising edge of SS_B for the previous SPI

command.

ST[1:0]

Status

Description

SF[1:0]

Priority

Device in Initialization

Device in initialization (ENDINIT not

set)

Normal Mode

Normal mode(ENDINIT set)

Self-test

Self-test(ST_CTRL[3:0] not equal to

'0000')

Internal Error Present

Detailed Status Field

Detailed

Status Field

Table 33. Basic status field for responses to register commands

7.5.5.2 Detailed status field

The response to sensor data requests includes a detailed status field (SF[1:0]). The

contents of the detailed status field is a representation of the device status at the rising

edge of SS_B for the previous SPI command.

SF[1:0]

Status Sources

DEVSTAT State

CM_ERROR

Temperature error

Bit set in DSP_STAT

Bit set in DEVSTAT2

User OTP memory error (UF2 or UF1)

User R/W memory error (UF2)

NXP OTP Memory error

U_OTP_ERR set in DEVSTAT2

U_RW_ERR set in DEVSTAT2

F_OTP_ERR set in DEVSTAT2

Test Mode active

Supply error

Reset error

TESTMODE bit set in DEVSTAT

Bit set in DEVSTAT1

DEVRES set

MISO error

SPI error

Bit set in DEVSTAT3

N/A

Table 34. Detailed status bit field descriptions

7.5.5.3 SPI error

The following external SPI conditions result in a SPI error:

• SCLK is high when SS_B is asserted.

• The number of SCLK rising edges detected while SS_B is asserted is not equal to 16.

• SCLK is high when SS_B is deasserted.

• CRC error is detected (MOSI).

• A register write command to any register other than the DEVLOCK_WR register is

received while ENDINIT is set.

If a SPI error is detected, the device responds with the error response as described in

Section 7.5.5.2 "Detailed status field" with the detailed status field set to “SPI Error” as

defined in Section 7.5.5.1 "Basic status field".

7.5.5.4 SPI data output verification error

The device includes a function to verify the integrity of the data output to the MISO pin.

The function compares the data transmitted on the MISO pin to the data intended to be

transmitted. If any one bit does not match, a SPI MISO mismatch fault is detected and

the MISO_ERR flag in the DEVSTAT2 register is set.

If a valid sensor data request message is received during the SPI transfer with the MISO

mismatch failure, the request is ignored and the device responds with the error response

FXPS7115D4

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 6 — 6 June 2022

26 / 75

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