STM32H757AI datasheet(37/251 Pages) STMICROELECTRONICS

37 / 251 page

DS12931 Rev 1

37/251

STM32H757xI

Functional overview

The devices embeds two operational amplifiers (OPAMP1 and OPAMP2) with two inputs

and one output each. These three I/Os can be connected to the external pins, thus enabling

any type of external interconnections. The operational amplifiers can be configured

internally as a follower, as an amplifier with a non-inverting gain ranging from 2 to 16 or with

inverting gain ranging from -1 to -15.

3.23

Digital filter for sigma-delta modulators (DFSDM)

The devices embed one DFSDM with 4 digital filters modules and 8 external input serial

channels (transceivers) or alternately 8 internal parallel inputs support.

The DFSDM peripheral is dedicated to interface the external Σ∆ modulators to

microcontroller and then to perform digital filtering of the received data streams (which

represent analog value on Σ∆ modulators inputs). DFSDM can also interface PDM (Pulse

Density Modulation) microphones and perform PDM to PCM conversion and filtering in

hardware. DFSDM features optional parallel data stream inputs from internal ADC

peripherals or microcontroller memory (through DMA/CPU transfers into DFSDM).

DFSDM transceivers support several serial interface formats (to support various Σ∆

modulators). DFSDM digital filter modules perform digital processing according user

selected filter parameters with up to 24-bit final ADC resolution.

The DFSDM peripheral supports:

•

8 multiplexed input digital serial channels:

–

configurable SPI interface to connect various SD modulator(s)

–

configurable Manchester coded 1 wire interface support

–

PDM (Pulse Density Modulation) microphone input support

–

maximum input clock frequency up to 20 MHz (10 MHz for Manchester coding)

–

clock output for SD modulator(s): 0..20 MHz

•

alternative inputs from 8 internal digital parallel channels (up to 16 bit input resolution):

–

internal sources: ADC data or memory data streams (DMA)

•

4 digital filter modules with adjustable digital signal processing:

–Sincx filter: filter order/type (1..5), oversampling ratio (up to 1..1024)

–

integrator: oversampling ratio (1..256)

•

up to 24-bit output data resolution, signed output data format

•

automatic data offset correction (offset stored in register by user)

•

continuous or single conversion

•

start-of-conversion triggered by:

–

software trigger

–

internal timers

–

external events

–

start-of-conversion synchronously with first digital filter module (DFSDM0)

•

analog watchdog feature:

–

low value and high value data threshold registers

–

dedicated configurable Sincx digital filter (order = 1..3, oversampling ratio = 1..32)

–

input from final output data or from selected input digital serial channels

–

continuous monitoring independently from standard conversion

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