DRV8317H datasheet(23/69 Pages) TI

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8.3.6 Slew Rate Control

An adjustable gate-drive current to the MOSFETs allows for driver output slew rate control. The MOSFET VDS

slew rate is a critical factor in optimizing radiated emissions, energy and duration of diode recovery spikes and

switching voltage transients related to parasitics. This slew rate is predominantly determined by the rate of gate

charge to the MOSFETs as shown in Figure 8-9.

OUTx

Slew Rate

Control

Slew Rate

Control

VLS

PGND

Figure 8-9. Slew Rate Control

The slew rate of each half-bridge can be adjusted by SLEW pin in hardware variant or by SLEW_RATE register

in SPI variant. The slew rate is calculated by the rise-time and fall-time of the voltage on OUTx pin as shown in

Figure 8-10.

20%

80%

20%

80%

fall

rise

OUTx

Time

Figure 8-10. Slew Rate Measurement

8.3.7 Cross Conduction (Dead Time)

The device is fully protected against any cross conduction of MOSFETs - during the switching of high-side and

low-side MOSFETs, DRV8317 avoids shoot-through events by inserting a dead time (tdead). This is implemented

by sensing the gate-source voltage (VGS) of the high-side and low-side MOSFETs and ensuring that VGS

of high-side MOSFET has dropped below turn-off level before switching on the low-side MOSFET of same

half-bridge (or vice-versa) as shown in Figure 8-11 and Figure 8-12. The VGS of the high-side and low-side

MOSFETs (VGS_HS and VGS_LS) shown in Figure 8-12 are DRV8317 internal signals.

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SLVSGT3 – DECEMBER 2022

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DRV8317H 데이터시트(PDF) 23 Page - Texas Instruments