STLC2500ATR datasheet(22/37 Pages) STMICROELECTRONICS

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General specification

STLC2500A

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After power-up, the low power clock must be available before the reset is released. It must

remain active all the time until the chip is powered off.

6.5

Clock detection

The system and low power clocks can be selected by specific HCI commands (16.384 KHz

or 32 KHz) or by an integrated automatic detection algorithm.

The clock detection routine steps are:

–

Identification of the system clock frequency

(13 MHz, 26MHz, 19.2 MHz or 38.4 MHz)

–

Identification of the low power clock (3.2 KHz or 32.768 KHz)

6.6

Interrupts

The user can program the GPIOs as external interrupt sources.

6.7

Low power modes

To save power, three low power modes are supported as described in table 18.

Depending of the Bluetooth and of the Host's activity, the STLC2500A decides to use sleep

mode or deep sleep mode.

Complete power down is entered only after an explicit command from the Host.

Table 17.

Low power modes

Description

Sleep mode

The STLC2500A:

– Accepts HCI commands from the Host.

– Supports all types of Bluetooth links.

– Can transfer data over Bluetooth links.

– Dynamically switches between sleep and active mode when

needed.

– The system clock is still active in part of the design.

– Parts of the chip can be dynamically powered off depending on the

Bluetooth activity.

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