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AX88780 데이터시트(PDF) 44 Page - ASIX Electronics Corporation |
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AX88780 데이터시트(HTML) 44 Page - ASIX Electronics Corporation |
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44 / 49 page ![]() AX88780 Symbol Description Min Typ. Max Units Tclk MDC clock timing* 2144 - ns Tod MDC falling edge to MDIO output delay - 32 ns Ts MDIO data input setup timing 10 - - ns Th MDIO data input hold timing 4 - - ns *Note: hclk is 66MHz case. 6.2.10 Serial EEPROM Timing Symbol Description Min Typ. Max Units EED I ( o u t put ) EEC L K Tc l k EED O ( i n put ) Ts Th To d EEC S Tl c s Th c s Ts c s Tclk EECLK clock timing* 2192 - ns Tod EECLK falling edge to EEDI output delay - 5 ns Ts EEDO data input setup timing 10 - - ns Th EEDO data input hold timing 16 - - ns Tscs rising edge 1040 EECS output valid to EECLK ns Thcs EECLK falling edge to EECS invalid timing 0 ns Tlcs Minimum EECS low timing - 1040 - ns ote: k is 66MHz case. *N hcl 44 ASIX ELECTRONICS CORPORATION |
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