KSZ9563RNXC-TR datasheet(8/226 Pages) MICROCHIP

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KSZ9563R

DS00002419D-page 8

 2017-2018 Microchip Technology Inc.

2.0

INTRODUCTION

2.1

General Description

The KSZ9563R is a highly-integrated, IEEE 802.3 compliant networking device that incorporates a layer-2+ managed

Gigabit Ethernet switch, two 10BASE-T/100BASE-TX/1000BASE-T physical layer transceivers (PHYs) and associated

MAC units, and one MAC port with a configurable RGMII/MII/RMII interface for direct connection to a host processor/

controller, another Ethernet switch, or an Ethernet PHY transceiver.

The KSZ9563R is built upon industry-leading Ethernet technology, with features designed to offload host processing

and streamline the overall design:

• Non-blocking wire-speed Ethernet switch fabric

• Full-featured forwarding and filtering control, including port-based Access Control List (ACL) filtering

• Full VLAN and QoS support

• Traffic prioritization with per-port egress queues and by traffic classification

• RSTP and MSTP Spanning Tree support

• IEEE 802.1X port-based authentication support

The KSZ9563R incorporates full hardware support for the IEEE 1588v2 Precision Time Protocol (PTP), including hard-

ware time-stamping at all PHY-MAC interfaces, and a high-resolution hardware “PTP clock”. IEEE 1588 provides sub-

microsecond synchronization for a range of industrial Ethernet applications.

The KSZ9563R supports only PTP one-step mode. With one-step mode enabled, the KSZ9563R supports the following

PTP operations:

• Transparent Clock (TC) with auto-correction update

• Master and slave Ordinary Clock (OC) support

• End-to-End (E2E) or Peer-to-Peer (P2P)

A host processor can access all KSZ9563R registers for control over all PHY, MAC, and switch functions. Full register

access is available via the integrated SPI or I2C interfaces, and by in-band management via any one of the data ports.

PHY register access is provided by a MIIM interface. Flexible digital I/O voltage allows the MAC port to interface directly

with a 1.8/2.5/3.3V host processor/controller/FPGA.

Additionally, a robust assortment of power-management features including IEEE 802.3az Energy-Efficient Ethernet

(EEE) for power savings with idle link, and Wake-on-LAN (WoL) for low power standby operation, have been designed

to satisfy energy-efficient system requirements.

The KSZ9563R is available in commercial (0°C to +70°C) and industrial (-40°C to +85°C) temperature ranges. An inter-

nal block diagram of the KSZ9563R is shown in Figure 2-1.

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