UPSD3422_V01 datasheet(165/300 Pages) STMICROELECTRONICS

165 / 300 page

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Product(s)

- Obsolete

Product(s)

Obsolete

Product(s)

- Obsolete

Product(s)

UPSD3422, UPSD3433, UPSD3434, UPSD3454

USB interface

165/300

●

USB IN FIFO NAK interrupt enable register (UIE3)

When an endpoint’s IN FIFO is empty and an IN transaction to that endpoint has been

received, the SIE sends a NAK handshake token since there is no data ready for it to

send.

The UIE3 register (see Table 110) is used to enable each endpoint’s IN FIFO NAK

Interrupt.

Table 109.

UIE2 register bit definition

Bit

Symbol

R/W

Definition

7–

–

Reserved

6–

–

Reserved

5–

–

Reserved

OUT4IE

R/W

Enable Endpoint 4 OUT FIFO interrupt

OUT3IE

R/W

Enable Endpoint 3 OUT FIFO interrupt

OUT2IE

R/W

Enable Endpoint 2 OUT FIFO interrupt

OUT1IE

R/W

Enable Endpoint 1 OUT FIFO interrupt

OUT0IE

R/W

Enable Endpoint 0 OUT FIFO interrupt

Table 110.

USB IN FIFO NAK interrupt enable register (UIE3 0E7h, reset value 00h)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

–

NAK4IE

NAK3IE

NAK2IE

NAK1IE

NAK0IE

Table 111.

UIE3 register bit definition

Bit

Symbol

R/W

Definition

–

Reserved

–

Reserved

–

Reserved

NAK4IE

R/W

Enable Endpoint 4 IN FIFO NAK interrupt

NAK3IE

R/W

Enable Endpoint 3 IN FIFO NAK interrupt

NAK2IE

R/W

Enable Endpoint 2 IN FIFO NAK interrupt

NAK1IE

R/W

Enable Endpoint 1 IN FIFO NAK interrupt

NAK0IE

R/W

Enable Endpoint 0 IN FIFO NAK interrupt

Obsolete

Product(s)

- Obsolete

Product(s)

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