R

EM6607

Copyright © 2005, EM Microelectronic-Marin SA

25

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11 Supply Voltage Level Detector (SVLD)

The EM6607 has a software configurable Supply Voltage Level detector. Three levels can be defined within the power

supply range. During SLEEP mode this function is disabled.

(see Chapter

135H

4.7

136H

The required voltage compare level is selected by writing the bits VLC1 and VLC2 in the SVLD control register that also

activates the compare measurement. Since the measurement is not immediate the busy flag remains high during the

measurement and is automatically cleared low when the measurement is finished. Reading the VLDR flag indicates the

result. If the result is 0 then the voltage level is higher than the selected compare level. And if 1 it is lower than the compare

level. The result VLDR of the last measurement remains until the new one is finished. The new result overwrites the

previous one.

During the SVLD operation power consumption increases by approximately 3

μA for 3.9msec. The measurement internally

starts with the rising 256Hz edge following the SVLD test command. The additional SVLD consumption stops after the

falling edge of the 256Hz internal clock.

Table below lists the voltage level selection

Table 38.

SVLD Level selection

Voltage level

VLC1

VLC0

Possible levels implementations

SVLD disabled

0

0

0

1

1

0

1

1

137H

15.1.1).

Table 39.

SVLD control register - SVLD

Bit

Name

Reset

R/W

Description

3

VLDR

0

R

SVLD result (0=higher 1=lower)

2

busy

0

R

measurement in progress

1

VLC1

0

R/W

SVLD level control 1

0

VLC0

0

R/W

SVLD level control 0