EM6821 datasheet(27/68 Pages) EMMICRO

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EM6821

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7. Melody, Buzzer

A normal application is to drive a buzzer connected onto the terminal Buzzer.

This peripheral cell is a combination of a 7 frequency tone generator and a 4-bit timer, used to provide a 50%

duty cycle signal on the Buzzer terminal of a pre-selected length and frequency. The Buzzer terminal is active

as long as the timer is not 0 or the SwBuzzer is set to ‘1’. The 4-bit timer can be used for another application

independent of the Buzzer terminal by selecting "silence" instead of another frequency on the Buzzer output.

"Silence" can also be used as part of a melody, or to switch off the buzzer.

To use the buzzer independent of the 4-bit timer one has to set the switch SwBuzzer. This bit is in register

RegMelTim and selects the signal duration on the buzzer output. If SwBuzzer=1 then the signal is output until

the bit is set back to 0 . With SwBuzzer=0 the output signal duration is controlled by the 4bit timer. If neither

the SwBuzzer or the timer are active, the Buzzer terminal is on 0.

The high impedance state setting with BzOutEn is independent of the SwBuzzer and Timer settings. As soon

as the bit is set to 1 the Buzzer terminal is set tristate. See also Figure 19.

7.1 4-Bit Timer

The timer has 2 modes:

- Single run mode (Auto=0)

- Continuos run mode (Auto=1)

Mode selection and timer count down frequency is done in register RegMelTim. All timer frequencies are

coming from the prescaler. The 4-bit timer can be used independent of the melody buzzer application.

Whenever the timer reaches 0 it generates an interrupt request IRQBz in the register RegIRQ2 . This interrupt

can be masked with the bit MaskIRQBz in register RegIRQMask2. By writing 0 into the timer period register

the timer stops immediately and does not generate an interrupt.

Figure 19. Melody Generator Block Diagram

C k[16]

(from P rescaler)

Frequency S elect

SwBuzzer

Auto

BzOutE n

Zero

Frequency

Generator

4 - B it T im er

T erm inal

FlBuzzer

IR Q Bz

Control & Status

R egisters

Internal D ata Bus D B[3:0]

Tim er Clock

(from P rescaler)

Control

Logic

Period R egister

VSS

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