5.2

Read operations

Read operations are performed independently of the state of the write control (WC) signal.

After the successful completion of a read operation, the device internal address counter is incremented by one, to

point to the next byte address.

For the read instructions, after each byte read (data out), the device waits for an acknowledgement (data in)

during the 9th bit time. If the bus master does not acknowledge during this 9th time, the device terminates the data

transfer and switches to its standby mode after a stop condition.

Figure 9. Read mode sequences

Dev select *

Byte address

Dev select

Data out 1

Data out N

Current Address Read

Dev select

Data out

Random Address Read

Dev select *

Data out

Sequential Current Read

Data out N

Dev select *

Byte address

Sequential Random Read

Dev select *

Data out 1

ACK

R/W

NO ACK

ACK

R/W

ACK

ACK

R/W

ACK

ACK

ACK

NO ACK

R/W

NO ACK

ACK

ACK

R/W

ACK

ACK

R/W

ACK

NO ACK

Note:

The seven most significant bits of the first device select code of a random read must be identical to the seven

most significant bits of the device select code of the write.

M24C01/02-W M24C01/02-R M24C02-F

Read operations

DS9398 - Rev 7

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