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68HC705JB2 데이터시트(PDF) 102 Page - NXP Semiconductors

부품명 68HC705JB2
상세설명  Industry standard M68HC05 CPU core
PDF  128 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
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68HC705JB2 데이터시트(HTML) 102 Page - NXP Semiconductors

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GENERAL RELEASE SPECIFICATION
August 28, 1998
EPROM
MC68HC705JB2
11-2
REV 1.1
11.3
EPROM PROGRAMMING
Programming the on-chip EPROM is achieved by using the Program Control
Register located at address $3E.
Please contact Motorola for programming board availability.
11.3.1 EPROM Program Control Register (PCR)
This register is provided for programming the on-chip EPROM.
MORON – Mask Option Register ON
0 =
Disable programming to Mask Option Register ($01FF)
1 =
Enable programming to Mask Option Register ($01FF)
ELAT – EPROM LATch control
0 =
EPROM address and data bus configured for normal reads
1 =
EPROM address and data bus configured for programming (writes
to EPROM cause address and data to be latched). EPROM is in
programming mode and cannot be read if ELAT is 1. This bit should
not be set when no programming voltage is applied to the Vpp pin.
PGM – EPROM ProGraM command
0 =
Programming power is switched OFF from EPROM array.
1 =
Programming power is switched ON to EPROM array. If ELAT
≠ 1,
then PGM = 0.
11.3.2 Programming Sequence
The EPROM programming sequence is:
1.
Set the ELAT bit
2.
Write the data to the address to be programmed
3.
Set the PGM bit
4.
Delay for a time tPGMR
5.
Clear the PGM bit
6.
Clear the ELAT bit
The last two steps must be performed with separate CPU writes.
PCR
$003E
bit-7
bit-6
bit-5
bit4
bit-3
bit-2
bit1
bit-0
Read
RESERVED
MORON
ELAT
PGM
Write
Reset
0000
0
000
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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