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HC705JB2GRS/H 데이터시트(PDF) 125 Page - NXP Semiconductors |
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HC705JB2GRS/H 데이터시트(HTML) 125 Page - NXP Semiconductors |
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125 / 128 page ![]() August 28, 1998 GENERAL RELEASE SPECIFICATION MECHANICAL SPECIFICATIONS REV 1.1 14-1 SECTION 14 MECHANICAL SPECIFICATIONS This section provides the mechanical dimensions for the two available packages for MC68HC705JB2: the 20-Pin PDIP and 20-Pin SOIC. 14.1 20-PIN PLASTIC DUAL-IN-LINE PACKAGE (PDIP) Figure 14-1. 20-Pin PDIP Mechanical Dimensions NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. DIMENSION L TO CENTER OF LEAD WHEN FORMED PARALLEL. 4. DIMENSION B DOES NOT INCLUDE MOLD FLASH. M L J 20 PL M B M 0.25 (0.010) T DIM MIN MAX MIN MAX MILLIMETERS INCHES A 25.66 27.17 1.010 1.070 B 6.10 6.60 0.240 0.260 C 3.81 4.57 0.150 0.180 D 0.39 0.55 0.015 0.022 G 2.54 BSC 0.100 BSC J 0.21 0.38 0.008 0.015 K 2.80 3.55 0.110 0.140 L 7.62 BSC 0.300 BSC M 0 15 0 15 N 0.51 1.01 0.020 0.040 __ __ E 1.27 1.77 0.050 0.070 1 11 10 20 –A– SEATING PLANE K N F G D 20 PL –T– M A M 0.25 (0.010) T E B C F 1.27 BSC 0.050 BSC Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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