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M5CAARCH-RM/D 데이터시트(PDF) 55 Page - NXP Semiconductors

부품명 M5CAARCH-RM/D
상세설명  C-5e NETWORK PROCESSOR SILICON REVISION A1
PDF  114 Pages
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제조업체  NXP [NXP Semiconductors]
홈페이지  http://www.nxp.com
Logo NXP - NXP Semiconductors

M5CAARCH-RM/D 데이터시트(HTML) 55 Page - NXP Semiconductors

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Pin Descriptions Grouped by Function
55
03
QMU SRAM (Internal
Mode) Interface Signals
The QMU signals are described in Table 27.
Table 27 QMU SRAM (Internal Mode) Interface Signals
SIGNAL NAME
PIN #
TOTAL
TYPE
I/O
SIGNAL DESCRIPTION
QA0 - QA16
C8, B8, A8, F9, E9, D9, C9, B9, A9, F10, D10, C10,
A10, G11, F11, E11, D11
17
LVTTL
O
Address [16:0]
QD0 - QD31
G1, F1, E1, D1, C1, B1, G2, F2, D2, C2, A2, G3, E3,
D3, B3, A3, G4, F4, E4, D4, C4, B4, A4, G5, F5, E5,
D5, C5, B5, A5, F6, D6
32
LVTTL
I
PD/O
Data
QDQPAR
C11
1
LVTTL
I
PD
nc
QARDY
E8
1
LVTTL
I
PD
nc
QNQRDY
D8
1
LVTTL
I
PD
nc
QWEX
C6
1
LVTTL
O
Write Enable
QBCLKO
A6
1
LVTTL
O
nc
QBCLKI
E7
1
LVTTL
I
PD
nc
QACLKO
D7
1
LVTTL
O
nc
QACLKI
B7
1
LVTTL
I
PD
Input Clock
QDPL
A7
1
LVTTL
I
PD/O
Data Parity Low
QDPH
F8
1
LVTTL
I
PD/O
Data Parity High
TOTAL PINS
59
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com



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