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VIPERGAN100TR 데이터시트(PDF) 20 Page - STMicroelectronics

부품명 VIPERGAN100TR
상세설명  Advanced quasi-resonant offline high voltage converter with E-mode GaN HEMT
PDF  35 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

VIPERGAN100TR 데이터시트(HTML) 20 Page - STMicroelectronics

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Figure 21. TB pin: (external configuration: dynamic
blanking time and valley synch)
Figure 22. TB pin: external configuration: (only
valley synch)
Figure 23. TB pin: external configuration (only
dynamic blanking time )
Figure 24. TB pin: external configuration (no
dynamic blanking time nor valley synch)
5.10
Overload and short-circuit protection
To manage an overload or a short-circuit condition, an internal up-down counter is incremented or decremented
with an internal clock, if the FB pin voltage is, respectively, above or below the upper saturation limit VFBH.
If the overload/short-circuit event persists for a time greater than TOVL (50 ms typical value), the switching is
inhibited and VDD is recycled between VDD_RESTART and VDD_ON by the periodical activation of the HV current
source. After TRESTART from protection tripping, the IC restarts switching with soft-start as soon as VDD is
recharged to VDD-ON. After soft-start (during which the overload counter is disabled), if overload is still present,
the switching activity is disabled again as previously described, otherwise it resumes normal operation. If the
overload/short-circuit event persists for a time smaller than TOVL, the counter is decremented cycle-by-cycle down
to zero and the IC is not stopped.
This fault management ensures low repetition rate restart attempts, so that the converter works safely with
extremely low power throughput and avoids the IC overheating in case of repeated overload events, and a prompt
resumption of normal operation at fault removal.
In case of transformer saturation, short-circuit of secondary side rectifier or deep CCM, a further protection feature
named OCP_LEB is embedded: if the drain current value is higher than IOCP_LEB at the end of LEB time for two
subsequent cycles the VIPERGAN100 shuts down for TSD-REST seconds and performs a new startup.
In case of VDD clamp activation with a current sunk from the pin higher than IDD-CL (26 mA typ.) and for a time
duration higher than TDD-CL (100 us typ.), the IC is shut down then restart after VDD recycling.
VIPERGAN100
Overload and short-circuit protection
DS14000 - Rev 1
page 20/35



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