STM32C011D4U6 datasheet(71/94 Pages) STMICROELECTRONICS

71 / 94 page

DS13866 Rev 3

71/94

STM32C011x4/x6

Electrical characteristics

Figure 20. ADC accuracy characteristics

Figure 21. Typical connection diagram using the ADC

1. Refer to Table 53: ADC characteristics for the values of RAIN and CADC.

2. Cparasitic represents the capacitance of the PCB (dependent on soldering and PCB layout quality) plus the

pad capacitance (refer to Table 49: I/O static characteristics for the value of the pad capacitance). A high

Cparasitic value will downgrade conversion accuracy. To remedy this, fADC should be reduced.

3. Refer to Table 49: I/O static characteristics for the values of Ilkg.

4. Refer to Figure 2: Power supply overview.

General PCB design guidelines

Power supply decoupling should be performed as shown in Figure 9: Power supply scheme.

The 100 nF capacitor should be ceramic (good quality) and it should be placed as close as

possible to the chip.

MSv19880V6

(1) Example of an actual transfer curve

(2) Ideal transfer curve

(3) End-point correlation line

n = ADC resolution

ET = total unadjusted error: maximum deviation

between the actual and ideal transfer curves

EO = offset error: maximum deviation between the first

actual transition and the first ideal one

EG = gain error: deviation between the last ideal

transition and the last actual one

ED = differential linearity error: maximum deviation

between actual steps and the ideal one

EL = integral linearity error: maximum deviation between

any actual transition and the end point correlation line

n-1

Output code

VSSA

n-2

n-3

VREF+ (VDDA)

1 LSB ideal

(1)

(2)

(3)

(or

)]

[1LSB =

VDDA

VREF+

MSv67871V3

Sample-and-hold ADC converter

Converter

Cparasitic

(2)

Ilkg

(3)

CADC

VDDA

(4)

RAIN

(1)

VAIN

RADC

VREF+

(4)

VSSA

I/O

analog

switch

Sampling

switch with

multiplexing

VSS

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