List of figures

Figure 1.

Block diagram .................................................................... 3

Figure 2.

Pin connection PowerSO-36 (top through view) ............................................. 4

Figure 3.

RDS(on) measurement .............................................................. 10

Figure 4.

dV/dT definition .................................................................. 10

Figure 5.

td(ON)-td(OFF) definition ............................................................ 11

Figure 6.

SPI mode diagram ................................................................ 15

Figure 7.

SPI input timing diagram ............................................................ 15

Figure 8.

SPI output timing diagram ........................................................... 16

Figure 9.

Watchdog behavior ................................................................ 16

Figure 10.

OUT_EN without effect on output ...................................................... 17

Figure 11.

OUT_EN effective on output channel.................................................... 17

Figure 12.

Power GOOD pin behavior........................................................... 18

Figure 13.

Thermal status update .............................................................. 19

Figure 14.

Switching on resistive load ........................................................... 20

Figure 15.

Switching on bulb lamp ............................................................. 20

Figure 16.

Switching on light inductive load ....................................................... 20

Figure 17.

Switching on heavy inductive load ...................................................... 20

Figure 18.

Short-circuit (with OVT) during ON state ................................................. 21

Figure 19.

Switching on short-circuit (with OVT) .................................................... 21

Figure 20.

Thermal protection flowchart ......................................................... 21

Figure 21.

Thermal protection and fault behavior (TJSD triggered before TCSD)............................... 22

Figure 22.

Thermal protection and fault behavior (TCSD triggered before TJSD)............................... 22

Figure 23.

Reverse polarity protection........................................................... 23

Figure 24.

VDD reverse polarity protection ........................................................ 24

Figure 25.

Single pulse demagnetization energy vs. load current (Typical values at TAMB = 125 °C) ................ 25

Figure 26.

Supply voltage and power output conventions ............................................. 26

Figure 27.

Simplified thermal model of the process stage ............................................. 27

Figure 28.

Example of daisy-chaining connection ................................................... 28

Figure 29.

PowerSO-36 package outline ........................................................ 29

Figure 30.

PowerSO-36 suggested footprint ...................................................... 31

Figure 31.

PowerSO-36 carrier tape ............................................................ 32

Figure 32.

PowerSO-36 shipping tube........................................................... 32

ISO808A, ISO808A-1

List of figures

DS14170 - Rev 1

page 36/38