| 전자부품 데이터시트 검색엔진 |
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LM5069 데이터시트(PDF) 2 Page - National Semiconductor (TI) |
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LM5069 데이터시트(HTML) 2 Page - National Semiconductor (TI) |
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2 / 22 page ![]() Connection Diagram 20197202 Top View 10-Lead MSOP Ordering Information Order Number Fault Response Package Type NSC Package Drawing Supplied As LM5069MM-1 Latch Off MSOP-10 MUB10A 1000 Units on Tape and Reel LM5069MMX-1 Latch Off 3500 Units on Tape and Reel LM5069MM-2 Auto Restart 1000 Units on Tape and Reel LM5069MMX-2 Auto Restart 3500 Units on Tape and Reel Pin Descriptions Pin # Name Description Applications Information 1 SENSE Current sense input The voltage across the current sense resistor (R S) is measured from VIN to this pin. If the voltage across R S reaches 55mV the load current is limited and the fault timer activates. 2 VIN Positive supply input A small ceramic bypass capacitor close to this pin is recommended to suppress transients which occur when the load current is switched off. 3 UVLO Under-voltage lockout An external resistor divider from the system input voltage sets the under-voltage turn-on threshold. An internal 21 µA current source provides hysteresis. The enable threshold at the pin is 2.5V. This pin can also be used for remote shutdown control. 4 OVLO Over-voltage lockout An external resistor divider from the system input voltage sets the over-voltage turn-off threshold. An internal 21 µA current source provides hysteresis. The disable threshold at the pin is 2.5V. 5 GND Circuit ground 6 TIMER Timing capacitor An external capacitor connected to this pin sets the insertion time delay and the Fault Timeout Period. The capacitor also sets the restart timing of the LM5069-2. 7 PWR Power limit set An external resistor connected to this pin, in conjunction with the current sense resistor (R S), sets the maximum power dissipation allowed in the external series pass MOSFET. 8 PGD Power Good indicator An open drain output. When the external MOSFET V DS decreases below 1.25V, the PGD indicator is active (high). When the external MOSFET V DS increases above 2.5V the PGD indicator switches low. 9 OUT Output feedback Connect to the output rail (external MOSFET source). Internally used to determine the MOSFET V DS voltage for power limiting, and to control the PGD indicator. 10 GATE Gate drive output Connect to the external MOSFET’s gate. This pin’s voltage is typically 12V above the OUT pin when enabled. www.national.com 2 |
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