LM5069 datasheet(13/22 Pages) NSC

13 / 22 page

Fault Timer & Restart (Continued)

The LM5069-2 provides an automatic restart sequence

which consists of the TIMER pin cycling between 4.0V and

1.25V seven times after the Fault Timeout Period, as shown

in Figure 6. The period of each cycle is determined by the 85

µA charging current, and the 2.5 µA discharge current, and

the value of the capacitor C

T. When the TIMER pin reaches

0.3V during the eighth high-to-low ramp, the 16 µA current

source at the GATE pin turns on Q1. If the fault condition is

still present, the Fault Timeout Period and the restart cycle

repeat.

Under-Voltage Lock-Out (UVLO)

The series pass MOSFET (Q1) is enabled when the input

supply voltage (V

SYS) is within the operating range defined

by the programmable under-voltage lockout (UVLO) and

over-voltage lock-out (OVLO) levels. Typically the UVLO

level at V

SYS is set with a resistor divider (R1-R3) as shown

in Figure 1. When V

SYS is below the UVLO level, the internal

21 µA current source at UVLO is enabled, the current source

at OVLO is off, and Q1 is held off by the 2 mA pull-down

current at the GATE pin. As V

SYS is increased, raising the

voltage at UVLO above 2.5V, the 21 µA current source at

UVLO is switched off, increasing the voltage at UVLO, pro-

viding hysteresis for this threshold. With the UVLO pin above

2.5V, Q1 is switched on by the 16 µA current source at the

GATE pin if the insertion time delay has expired (Figure 3).

See the Applications Section for a procedure to calculate the

values of the threshold setting resistors (R1-R3). The mini-

mum possible UVLO level at V

SYS can be set by connecting

the UVLO pin to VIN. In this case Q1 is enabled when the

VIN voltage reaches the POR

EN threshold.

Over-Voltage Lock-Out (OVLO)

The series pass MOSFET (Q1) is enabled when the input

supply voltage (V

SYS) is within the operating range defined

by the programmable under-voltage lockout (UVLO) and

over-voltage lock-out (OVLO) levels. If V

SYS

raises the

OVLO pin voltage above 2.5V Q1 is switched off by the 2 mA

pull-down current at the GATE pin, denying power to the

load. When the OVLO pin is above 2.5V, the internal 21 µA

current source at OVLO is switched on, raising the voltage at

OVLO to provide threshold hysteresis. When V

SYS is re-

duced below the OVLO level Q1 is enabled. See the Appli-

cations Section for a procedure to calculate the threshold

setting resistor values.

Shutdown Control

The load current can be remotely switched off by taking the

UVLO pin below its 2.5V threshold with an open collector or

20197215

FIGURE 5. Latched Fault Restart Control

20197216

FIGURE 6. Restart Sequence (LM5069-2)

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