| 전자부품 데이터시트 검색엔진 |
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LP3929 데이터시트(PDF) 7 Page - National Semiconductor (TI) |
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LP3929 데이터시트(HTML) 7 Page - National Semiconductor (TI) |
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7 / 12 page ![]() Electrical Characteristics Unless otherwise specified: C VBAT = 1 µF, IOUT = 1 mA, CVDDB = 1 µF, CVDDA = 1 µF. Typical values and limits appearing in standard typeface apply for T A = 25˚C. Limits appearing in boldface type apply over the entire ambient temperature range for operation, −30˚C to +85˚C. (Notes 3, 4) Symbol Parameter Conditions Min Typ Max Units Supply Current I DD Supply Current All Channels Static: A → B mode, LDO unloaded V BAT 4 7 mA V DDA 95 200 µA I DDZ Supply Current — Shutdown EN = V SS V BAT 0.1 2 µA V DDA 0.2 2 µA C OUT Output Capacitance (Note 15) B (card) port 15 20 pF Level Shifter AC Switching Characteristics Unless otherwise specified: C VBAT = 1 µF, IOUT =1 mA, C VDDB = 1 µF, CVDDA = 1 µF. Typical values and limits appearing in standard typeface apply for TA = 25˚C. Limits ap- pearing in boldface type apply over the entire ambient temperature range for operation, −30˚C to +85˚C. (Notes 3, 5, 15, 16) Symbol Parameter Conditions Min Typ Max Units t PLH Propagation Delay A to B or B to A C LB = 15 pF, CLA =20pF, 50%-50% 3 7 ns Propagation Delay CLK_A to fCLK_A C LA = 20 pF, 50%-50% 5 14 ns t PHL Propagation Delay A to B or B to A C LB = 15 pF, CLA =20pF, 50%-50% 3 7 ns Propagation Delay CLK_A to fCLK_A C LA = 20 pF, 50%-50% 5 14 ns t RISE Rise Time A Side Output Figure 2 C LA = 20 pF, 20%-70% 1.1 3 ns Rise Time B Side Output with ASIP Figure 2 C LB = 15 pF, 20%-70% 1.6 3 ns t FALL Fall Time A Side Output Figure 2 C LA = 20 pF, 20%-70% 1.0 3 ns Fall Time B Side Output with ASIP Figure 2 C LB = 15 pF, 20%-70% 1.9 3 ns t SKEW Skew between D0–D3, CLK and CMD outputs (either edge) <0.5 1.0 ns t EN Enable Time 30 200 µs t DIS Disable Time 18 50 ns t TA Level-Shifter Direction Switch Response (Turn Around) Time 13 20 ns www.national.com 7 |
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