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AD9923ABBCZ 데이터시트(PDF) 62 Page - Analog Devices

부품명 AD9923ABBCZ
상세설명  CCD Signal Processor with V-Driver and Precision Timing??Generator
PDF  88 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9923ABBCZ 데이터시트(HTML) 62 Page - Analog Devices

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AD9923A
Rev. 0 | Page 62 of 88
Table 43. Standby Mode Operation—Vertical and Shutter Outputs
Output
Standby 3 (Default)1, 2
OUTCONTROL = Low
Standby 23, 4
Standby 13, 4
XV1
Low
Low
Low
Low
XV2
Low
Low
Low
Low
XV3
Low
Low
Low
Low
XV4
Low
Low
Low
Low
XV5
Low
Low
Low
Low
XV6
Low
Low
Low
Low
XV7
Low
Low
Low
Low
XV8
Low
Low
Low
Low
XV9
Low
Low
Low
Low
XV10
Low
Low
Low
Low
XV11
Low
Low
Low
Low
XV12
Low
Low
Low
Low
XV13
Low
Low
Low
Low
VSG1
Low
High
High
High
VSG2
Low
High
High
High
VSG3
Low
High
High
High
VSG4
Low
High
High
High
VSG5
Low
High
High
High
VSG6
Low
High
High
High
VSG7
Low
High
High
High
VSG8
Low
High
High
High
XSUBCK
Low
High
High
High
VSUB5
Low
Low
Low
Low
MSHUT5
Low
Low
Low
Low
STROBE5
Low
Low
Low
Low
1 Polarities for vertical and shutter outputs when the AD9923 is in Standby 3 mode are programmable using the STANDBY3POL register, Address 0xE2 (default register
value = 0x000000).
2 Bit assignments for the STANDBY3POL[23:0] register (Address 0xE2): (MSB) STROBE, MSHUT, VSUB, XSUBCK, VSG8, VSG7, VSG6, VSG3, VSG5, VSG4, VSG2, VSG1, XV13,
XV12, XV11, XV10, XV9, XV8, XV7, XV6, XV5, XV4, XV3, XV2, and XV1 (LSB).
3 Polarities for vertical outputs when the AD9923 is in Standby 1, Standby 2, or if OUTCONTROL = low, are programmable using the STANDBY12POL register,
Address 0xF3 (default register value = 0x3FE000)
4 Bit assignments for the STANDBY12POL[20:0] register (Address 0xF3): (MSB) XSUBCK, VSG8, VSG7, VSG6, VSG3, VSG5, VSG4, VSG2, VSG1, XV13, XV12, XV11, XV10, XV9,
XV8, XV7, XV6, XV5, XV4, XV3, XV2, and XV1 (LSB).
5 VSUB, MSHUT, and STROBE polarities for Standby 1, Standby 2, or if OUTCONTROL = low are controlled by STANDBY3POL.



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